SIC INSTRUCTION SET


– The instruction set of SIC can be divided into the following categories.
– The opcodes are in hexa decimal format.
– (m..m+2) represents the contents of memory locations m through m+2 i.e. 3-bytes.
MNEMONIC OPCODE EFFECT
************* ************ ***************

1)INSTRUCTIONS THAT LOAD THE REGISTERS
**************************************
LDA m 00 A <- (m..m+2)
LDCH m 50 A[Right most byte] <- m
LDX m 08 L <- (m..m+2)
LDL m 04 X <- (m..m+2)

2)INSTRUCTIONS THAT STORE THE REGISTER VALUES
*********************************************
STA m 0C m..m+2 <- (A)
STCH m 54 m <- (A)[Right most byte]
STX m 14 m..m+2 <- (X)
STL m 10 m..m+2 <- (L)

3)INTEGER ARITHMETIC OPERATIONS
*******************************
ADD m 18 A <- (A) + (m..m+2)
SUB m 1c A <- (A) – (m..m+2)
MUL m 20 A <- (A) * (m..m+2)
DIV m 24 A <- (A) / (m..m+2)
AND m 40 A <- (A) & (m..m+2)
OR m 44 A <- (A) | (m..m+2)

4)COMPARISION INSTRUCTION
*************************
COMP m 28 (A) : (m..m+2)
(Condition code CC is set to = or < or > to indicate the result)

5)CONDITIONAL JUMP INSTRUCTIONS
*******************************
J m 3C PC <- m
JEQ m 30 PC <- m if CC is set to =
JGT m 34 PC <- m if CC is set to >
JLT m 38 PC <- m if CC is set to <
JSUB m 48 L <- PC ,PC <- m
RSUB m 4c PC <- (L)

6)INSTRUCTIONS THAT PERFORM I/O
*******************************

TD m E0 Test device specified by (m)

RD m D8 (A) [Right most byte] <-
Device specified by (m)

WR m DC Device specified by (m)<-
(A) [Right most byte]

One thought on “SIC INSTRUCTION SET”

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s